ME218c Acronym Dictionary
Bi-Phase Mark | Digital encoding with a transition at the center of the bit time indicating a 1 |
Bi-Phase Space | Digital Encoding with a transition at the center of the bit time indicating a 0 |
CPHA | SPI Clock Phase selcet bit in SP0CR1 |
CPOL | SPI Clock Polarity select bit in SP0CR1 |
FE | SCI Framing Error flag bit in SC0SR1 |
IDLE | SCI Idle Line detect bit in SC0SR1 |
ILE | SCI Indle Line interrupt Enable bit in SC0CR2 |
ILT | SCI Idle Line Type bit in SC0CR1 |
ISO | International Standard Organization |
LOOPS | SCI Loop/Single wire mode select bit in SC0CR1 |
LSB | Least Significant Bit |
LSBF | SPI Least Significant Bit First bit in SP0CR1 |
M | SCI it to select 8/9 biut data in in SC0CR1 |
Manchester | Digital encoding with a rising edge at the center of the bit time indicating a 1, a falling edge indicates a 0 |
MODF | SPI Mode Fault flag bit in in SP0SR |
MSB | Most Significant Bit |
MSTR | SPI Master mode select bit in SP0CR1 |
NF | SCI Noise Flag bit in SC0SR1 |
NRZ | Non-Return to Zero |
NRZI | Non-Return to Zero inversion |
OSI | Open Systems Interconnect |
PE | SCI Parity Enable bit in SC0CR1 |
PF | SCI Parity Error flag bit in SC0SR1 |
PT | SCI Parity Type (even/odd) bit in SC0CR1 |
PURDS | Pull-up, Reduced Drive control for Port S register |
RAF | SCI Receiver Active Flag in SC0SR2 |
RE | SCI Receiver Enable bit in SC0CR2 |
RIE | SCI Receive Interrupt Enable bit in SC0CR2 |
RSRC | SCI Receiver Source select bit in SC0CR1 |
RWU | SCI Receiver Wake Up bit in SC0CR2 |
SBK | SCI Send Break bit in SC0CR2 |
SC0BD | SCI 0 Baud Rate Register |
SC0CR1 | SCI 0 Control Register 1 |
SC0CR2 | SCI 0 Control Register 2 |
SC0DRH | SCI 0 Data Register High byte |
SC0DRL | SCI 0 Data Register Low byte |
SC0SR1 | SCI 0 Status Register 1 |
SC0SR2 | SCI 0 Status Register 2 |
SCI | Serial Communications Interface |
SP0BR | SPI 0 Baud Rate Register |
SP0CR1 | SPI 0 Control Register 1 |
SP0CR2 | SPI 0 Control Register 2 |
SP0DR | SPI 0 Data Register |
SP0SR | SPI 0 Status Register |
SPC0 | SPI Control 0 bit in SP0CR2 select normal or Bi-directional mode |
SPE | SPI Enable bit in SP0CR1 |
SPI | Serial Peripheral Interface Let see what happens when I make it wrap |
SPIE | SPI Interrupt Enable bit in SP0CR1 |
SPIF | SPI transmit/receive complete bit in SP0SR |
SSI | Standard/Simple Serial Interface |
SSOE | SPI Slave Select Output Enable bit in SP0CR1 |
SSWAI | SPI Stop in Wait bit in SP0CR2 |
SWOM | SPI Wired OR mode for SPI pins (PortS 7:4) |
TC | SCI Transmit Complete bit in SC0SR1 |
TCIE | SCI Transmit Complete Interrupt Enable bit in SC0CR2 |
TDRE | SCI Transmit Data Register Empty bit in SC0SR1 |
TE | SCI Transmitter Enable bit in SC0CR2 |
TIE | SCI Transmit Interrupt Enable bit in SC0CR2 |
WAKE | SCI Bit to select idle/address wakeup in in SC0CR1 |
WCOL | SPI Write Collision flag bit in SP0SR |
WOMS | SCI Wired OR Mode Select bit in in SC0CR1 |